(1) Field of the Invention
The invention concerns frequency synthesizers for generating, e.g., ultra-high frequency signals, by combining frequencies from several sources.
(2) Description of the Prior Art
Many prior frequency synthesizers have been based upon phase lock loops. A reference input frequency F.sub.R is input as the first signal to a phase comparator, which receives a second input signal by means of feedback to be described below. The output of the phase comparator is a phase error signal which goes through a low pass filter and an amplifier and controls the frequency of a voltage-controlled oscillator (VCO). The output of the VCO is the desired synthesized frequency, which is N times F.sub.O. A sample of that output frequency is input to a frequency divider which divides the frequency by N. After phase lock acquisition the output of the divider is at frequency F.sub.R ; it is the above-mentioned second input of the phase comparator.
This prior type of frequency synthesizer tends to have a noisy output because of noise that is introduced by the VCO and not effectively suppressed by the phase lock loop. The use of the frequency divider aggravates the output noise situation, as will be discussed below. The textbook "Electronic Devices and Circuit Theory", by R. Boylestad and L. Nashelsky, Prentice-Hall, Inc., describes on page 634 of the third edition an example of a synthesizer that utilizes a frequency divider.